diff options
| author | eunhhu <[email protected]> | 2026-09-29 13:55:35 +0100 |
|---|---|---|
| committer | eunhhu <[email protected]> | 2026-09-29 13:55:35 +0100 |
| commit | e680e67dc99c33cfaa3152613bddf3742263e385 (patch) | |
| tree | 24838a14c39a119f127f0da33fa1a1221d10ab5a /core/module.c | |
| parent | 315c1f970c2ae482bceec2a9cc8666e6cb380a81 (diff) | |
| download | pure-e680e67dc99c33cfaa3152613bddf3742263e385.tar.gz pure-e680e67dc99c33cfaa3152613bddf3742263e385.zip | |
Give M2's devices a timer each, and say when the slow records were made
The load generator asked all ten thousand senders for their timers every
5 ms: 83 % of its CPU (47 ns a sender, mostly cache misses), and records
were timed from the start of that pass, so the pass (0.75-0.94 ms, longer
as the sender grew) was the floor of every latency it measured. A device
now keeps its sender's next timer, asked again only when the sender is
touched (the only time it changes), and the p50 of M2 falls from 0.8 to
0.4 ms for every version alike. It also says the p50 and p99 of the
records made in each second, and the keys and X25519s its senders made.
Diffstat (limited to 'core/module.c')
0 files changed, 0 insertions, 0 deletions
