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authoreunhhu <[email protected]>2026-09-30 17:59:47 +0100
committereunhhu <[email protected]>2026-09-30 17:59:47 +0100
commit402c19311b247889b36ff3be834d9fab19555af7 (patch)
treee243c7b97b8bdaf894c0487ccbcfc4def633f5d4 /core/module-save.c
parent07047c391f32c43827c0da145f6c89edb5007941 (diff)
downloadpure-402c19311b247889b36ff3be834d9fab19555af7.tar.gz
pure-402c19311b247889b36ff3be834d9fab19555af7.zip
Count instructions where timing cannot tell 3% apart (110)
016's second stage passed its criterion: six interleaved pairs against ee21aec gave TPC-C (RAM, W=1) -0.6% at the median and the bank's queries 0.0% to +2.2%, no run interfered. The ranks query was slower all six times, and chasing it showed that on this Pi timing cannot separate 1-3%: two servers asked in turns disagree with themselves (ee21aec to e02bfc9 +1.6%, e02bfc9 to 481642f -1.2%, ee21aec to 481642f +2.8%), and a query whose instructions grew 0.6% ran 3.5% faster. Instructions do not move so: pcount.c counts the server's user-mode instructions with perf_event_open (no perf here), and psample.c samples where they go. ranks had grown 0.4% in instructions (the rest was where code and data landed), per_branch 3.6% and tables 20 instructions a row, which 07047c3 halved. The six pairs of 07047c3 were interfered (another session's build, load 4-12) and are kept apart, unused.
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